The majority of present day integrated circuits are implemented by using a plurality of interconnected field effect transistors (FETs), also sometimes referred to as metal oxide semiconductor field effect transistors (MOSFETs or MOS transistors). A FET includes a gate electrode as a control electrode overlying a semiconductor substrate and spaced-apart source and drain regions in the substrate between which a current can flow. A gate insulator is disposed between the gate electrode and the semiconductor substrate to electrically isolate the gate electrode from the substrate. A control voltage applied to the gate electrode controls the flow of current through a channel in the substrate underlying the gate electrode between the source and drain regions. The FETs are generally “N” or “P” type FETs, (“nFET” or “pFET”) where the source and drain for nFETs are implanted with “N” type conductivity-determining ions, and the source and drain for pFETs are implanted with “P” type conductivity determining ions.
Many radio frequency switches or power amplification applications require FETs with special performance criteria. A silicon on insulator (SOI) substrate is often used, where the substrate includes a buried insulating layer that aids in electrically isolating different electronic components. An SOI substrate can be used to manufacture a fully depleted FET, where the substrate underlying the gate is so thin that it becomes fully depleted of mobile charges, so there is no floating body effect. However, a partially depleted FET is desirable in some instances. For example, a partially depleted FET can improve linearity and power handling capability, especially if a control voltage is applied to the substrate underlying the gate. Three dimensional FETs are also desirable for certain applications. Three dimensional FETs may have increased gate control of the transistor channel, lower resistance in the “on” mode, reduced capacitance in the “off” mode, reduced current leakage, and reduced short channel effects, which can allow improved power handling capability. In general, each type of FET has certain strengths and weakness. An integrated circuit generally includes several different electrical operations or functions. Therefore, a mixture of different types of FETs can produce an integrated circuit with improved properties, because different strengths or weaknesses of different types of FETs are better suited to different electrical functions. However, the manufacturing processes for the different types of FETs are different, so integrated circuits generally do not include a wide variety of different types of FETs. Integrated circuits with more than one type of FET are generally more expensive to manufacture.
Accordingly, it is desirable to provide integrated circuits and methods of manufacturing integrated circuits with different types of FETs. In addition, it is desirable to provide integrated circuits and methods of forming them with on SOI substrates where limited manufacturing steps are utilized to provide a variety of different types of FETs. Furthermore, other desirable features and characteristics of the present embodiment will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.